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(parent: 249735c) | patch
x86/mwait-idle: Broadwell support
authorLen Brown <len.brown@intel.com>
Tue, 9 Sep 2014 16:11:10 +0000 (18:11 +0200)
committerJan Beulich <jbeulich@suse.com>
Tue, 9 Sep 2014 16:11:10 +0000 (18:11 +0200)
commitc645b32ae1f4f4a0e9bd787cc7aab7e2a6e7593c
treedc75f8e7377d210b13d89045e6aff0f8f9840d2dtree | snapshot
parent249735c48fb24cff44957f7d0bcb6cbf1f29fc4ccommit | diff
x86/mwait-idle: Broadwell support

Broadwell (BDW) is similar to Haswell (HSW), the preceding processor generation.

Currently, the only difference in their C-state tables is that PC3 max exit latency
is 33usec on HSW and 40usec on BDW.

Signed-off-by: Len Brown <len.brown@intel.com>
Signed-off-by: Jan Beulich <jbeulich@suse.com>
xen/arch/x86/cpu/mwait-idle.c diff | blob | history
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